1. Field of the Invention
The present invention relates to computer systems having cache memories in which access to data is controlled with storage keys.
2. Description of Related Art
Large scale computer systems, such as systems based on the IBM ESA/370 or ESA/390 architectures, associate storage keys with partitions of mainstore to control access. In order to access data from a given partition of the mainstore, the requestor must use the appropriate storage key. These systems also include cache memories which store lines of data. The cache memories must maintain the storage key protection. Thus, storage keys for the lines of data held in the cache must be available in the cache memory system. See, IBM ESA/370 Principles of Operation, particular pages 3-7 through 3-11 concerning storage keys.
A question which always arises early in the design of such cache memory systems is whether the storage keys should be kept in the tags, which associate a physical address with a line of data in the cache, or in the translation lookaside buffer, which maintains translations from logical addresses used to access the cache, to physical addresses kept in the tag. Prior art systems have kept the storage keys in both places.
If the storage key is kept in the tag, the key and data can be moved in with a single operation, since the cache tags are logically associated with cache data. However, protection exceptions, which are based on the keys that apply to entire partitions of mainstore rather than single lines, cannot be determined unless the data subject of the request is cache resident. Thus, store ahead may only be done on cache accesses which are not key protected, that is, having a key of zero in the IBM ESA/370 architecture.
Also, with keys stored in the tag on line boundaries, move in performance of cache data may be affected by the mainstore key array bandwidth, since the keys must be supplied with each move in.
Because TLB entries are maintained on page boundaries, a given storage key need only be accessed once per page if the key is maintained in the TLB. This reduces traffic to mainstore for key related requests, such as set change bit and the like. Also, the Set-Storage-Key instruction (SSK) can be implemented using a TLB based search similar to that of the Invalidate-Page-Table-Entry instruction (IPTE).
However, in a system which maintains keys in the TLB, entries in the TLB for real pages must be kept in the TLB, which dilutes the TLB somewhat and adds some complexity due to the possibility that virtual-equal-real pages and high usage real pages, such as page zero, will be cache resident. However, there has been a growing need to keep real entries in the TLB anyway as the mapping from real to physical addresses or their equivalent, and associated addressing exception analysis, have become increasingly complex.
Thus, it would be desirable to provide for maintaining the storage keys in cache memory systems, which takes advantage of the performance advantage of tag based approaches in which the mainstore key and data can be moved in with a single operation, while also taking advantage of maintaining keys on page boundaries in the TLB.